Our client is one of the fastest growing start-up companies in the northeast corridor know as Silicon Alley. They operate on the leading edge of the technology envelope on extremely aggressive projects and schedules. Their core competency in semiconductor technologies and packaging techniques is unsurpassed. However, their expertise in developing a multi-layer printed circuit substrate for their new flip chip package was challenged.
IST was able to fill that void. We were contracted to work along side their internal design team to develop a multi-layer substrate with buried micro-vias. We developed an approach which required each layer to be manufactured separately and then stacked together, much like a deck of cards, to create the final multi-layer assembly. This technique was unprecedented in the industry at this time as conventional manufacturing processes typically stacked and simultaneously drilled all layers together.
A major hurdle we devoted considerable time to solving surrounded the pad, via, and trace registration between layers. Of critical importance was the bonding process of securing the multi-layer assembly while maintaining a pad-to-pad registration accuracy between layers within a tolerance of 250 microns. Care had to be given to the multi-layer stack so as not to induce warping or trace deformation at elevated curing temperatures which would adversely affect the via registration between layers.
Because of our knowledge and expertise of materials and printed circuit board technologies, we were able to develop the processes which allowed our customer to prototype a multi-layer substrate with buried micro-vias. Our customer selected a manufacturer to produce a prototype and continued to test and validate their new design.
ist gets it done!